Session 1: (1:30-3:00 PM)
Keynote Speech: Prof. David Albonesi, University of Cornell
Multi-threaded microprocessors exacerbate the variability in behavior
observed in common workloads. As applications with extremes in
behavior are coupled with like applications, even more extreme
behavior may be observed. This extreme variability in workload demand
results in hardware inefficiencies in a static, non-adaptive
microprocessor, and may even increase system cost.
"Mapping Streaming Architectures on Reconfigurable Platforms"
Nikolaos Bellas, Sek M. Chai, Malcolm Dwyer, Dan Linzmeier
Embedded Systems Research, Motorola Labs
Session 2: (3:30- 5:00PM)
"Custom Code Generation for Soft Processors"
Martin Labrecque, Peter Yiannacouras and J. Gregory Steffan,
University of Toronto
"Improving Instruction Level Parallelism through Reconfigurable Units
in Superscalar Processors" Tameesh Suri, State University of New York
at Binghamton
"Architectural Contesting: Exposing and Exploiting Temperamental Behavior",
Hashem H. Najaf-abadi Eric Rotenberg, North Carolina State University
Title: "Adaptive Multi-threaded Microprocessors"
Adaptation to workload demands comes in many forms for many purposes.
A common theme is the dynamic, runtime management of hardware to
increase hardware efficiency, or to prevent some specification
(temperature, noise) from being exceeded. In this talk, I will
discuss some recent results in dynamically adapting multi-threaded
microprocessors to varying workload behavior.